In the semiconductor industry, there is a trend to fabricate higher device densities. To achieve higher and higher densities per chip, efforts continue to scale down device dimensions (e.g., at submicron levels) on semiconductor wafers. For example, smaller and smaller feature sizes are being fabricated on integrated circuits (ICs) within small rectangular portions of the wafer, commonly known as dies. Examples of such features include width and spacing of interconnecting lines, spacing and diameter of contact holes and surface geometry such as corners and edges. In order to scale down device dimensions, precision control of the fabrication process is required. The dimension of and between features typically is referred to as critical dimensions or CD. Reducing CDs and reproducing more accurate CDs facilitates achieving higher device densities through scaled down dimensions and increased packing.
The process of manufacturing semiconductors or ICs typically includes numerous steps (e.g., exposing, baking, developing, etc.), during which hundreds of copies of an integrated circuit can be formed on a single wafer, and more particularly on each die of the wafer. In many of these steps, material is overlayed or removed from existing layers at specific locations to form desired elements of the integrated circuit. Generally, the manufacturing process involves creating several patterned layers on and into a substrate that ultimately forms the complete integrated circuit. This layering process creates electrically active regions in and on the semiconductor wafer surface.
In general, lithography refers to a process for pattern transfer between various media. It is a technique utilized in integrated circuit fabrication in which a silicon slice (the wafer) is coated uniformly with a radiation-sensitive film (the photoresist) and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template (the photoresist mask) to form a particular pattern. The lithographic coating generally is a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive of the subject pattern. Exposure of the coating through the photoresist mask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer. The resulting pattern image in the coating, or layer, can be at least one portion of a semiconductor device that contributes to the overall structure and function of the device.
Because the photoresist is used to form features on semiconductor devices, the integrity of the photoresist must be maintained throughout the lithography process. That is, any flaw or structural defect that is present on a patterned photoresist can be indelibly transferred to underlying layers during a subsequent etch process wherein the photoresist is employed.
The causes of mask (reticle) CD errors have two primary sources: the process (resist, develop, etch) and the writing tool. Over the past few years, the mask industry has been focused on migrating to dry-etch processes in order to achieve better CD control during the chrome patterning. However, to achieve better resolution and to improve the CD uniformity of resist images, photomask manufacturing will require the use of higher energy e-beam exposure systems. Each of these improved specifications has required in the past and will require in the future a reevaluation of the resist systems being used, since the performance of the resist will be one of the most important factors in meeting advanced mask-fabrication specifications.
One particular area of concern in the reticle manufacturing process involves the time between exposure and post-expose bake of the reticle. Critical dimensions (CDs) written onto the surface of a reticle can vary since the chemically amplified resists (CARs) utilized with electron beam lithography (reticle fabrication) are very susceptible to airborne contaminants.
There are a number of factors related to the utilization of CARs such as the stability of the resist related to environmental contaminants such as airborne amines, sensitivity to post-apply and post-exposure bake (PAB/PEB) temperature variations and post-coat and post-exposure delay stability. Stability of CDs related to time delay is commonly known as the vacuum effect. The vacuum effect describes when the CD of a feature varies in response to the time spent under high vacuum after exposure.
Therefore, when utilizing CARs to facilitate the exposure of a mask to an electron beam, what is needed is a system to ensure the CDs written on a reticle by an e-beam lithography system are consistent throughout a given fabrication process.